A/D converters are widely used in many applications. Cyclic or algorithmic A/D converters, in which an analog signal to be converted is cycled serially through analog arithmetic and comparator circuits, are useful in applications requiring small circuit size and power drain, but are somewhat slower than alternatives such as "flash" converters or "pipeline" converters that can perform conversion steps in parallel. A prior-art algorithmic A/D converter using switched-capacitance techniques is described in McCharles et al., "An Algorithmic Analog-to-Digital Converter," IEEE International Solid-State Circuits Conference Digest of Technical Papers (1977), pp 96-97. A similar A/D converter in which a multiply-by-two function is achieved by addition is disclosed in U.S. Pat. No. 4,529,965.
Algorithmic A/D converters typically operate by sequentially comparing an analog signal with a reference, multiplying the signal by a constant (usually 2), subtracting a value from the result of the multiplication depending on the result of the comparison and repeating the comparison, multiplication and subtraction sequence until the required number of binary digits ("bits") is obtained. In some converters the multiplication and subtraction steps are interchanged. Each cycle generates one bit of the digital representation of the analog signal being converted. The prior art converters referred to above include an arithmetic circuit to perform the subtraction and multiplication and a sample-and-hold circuit to store the analog residue from the preceding cycle.
In a fast A/D converter the comparator may not have time to completely settle before its output is used. For this reason, and also because the inputs to the comparator may be very close in value, the output of the comparator can be in error. Improvements employing multi-level comparators and digital correction to compensate for errors thus made are known in the art, for example, as disclosed in U. S. Pat. No. 5,017,920.
The need is for fast, accurate A/D converters that can be implemented with a minimum of circuitry, thus requiring less area on a semiconductor chip and less operating power.